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Publicationer information ikon
Introduction to hardware/software
codesign
Referentgranskad
DOI
10.1007/978-94-017-7267-9_41
Ha, Soonhoi;Teich, Jürgen;Haubelt, Christian;Glaß, Michael;Mitra, Tulika;Dömer, Rainer;Eles, Petru;S...
Springer Netherlands
2017
Publicationer information ikon
Codesign
Case Study on Transport-Triggered Architectures
Referentgranskad
DOI
10.1007/978-94-017-7358-4_39-1
Takala, Jarmo;Jääskeläinen, Pekka;Pitkänen, Teemu Oskari
Springer
2017
Publicationer information ikon
Software/hardware
codesign
for platform chips
Soininen, Juha-Pekka; Melakari, Klaus; Tiensyrjä, Kari
Embedded Systems Conference, ESC '98
1998
Publicationer information ikon
The DSPCAD framework formodeling and synthesis of signal processing systems
Referentgranskad
DOI
10.1007/978-94-017-7267-9_36
Lin, Shuoxin;Liu, Yanzhou;Lee, Kyunghun;Li, Lin;Plishker, William;Bhattacharyya, Shuvra S.Bhattachar...
Springer Netherlands
2017
Publicationer information ikon
The DSPCAD Framework for Modeling and Synthesis of Signal Processing Systems
Referentgranskad
DOI
10.1007/978-94-017-7358-4_36-1
Lin, Shuoxin;Liu, Yanzhou;Lee, Kyunghun;Li, Lin;Plishker, William;Bhattacharyya, Shuvra S.
Springer Netherlands
2017
Publicationer information ikon
Automated HW/SW co-design for edge AI: State, challenges and steps ahead
Referentgranskad
Öppen tillgång
DOI
10.1145/3478684.3479261
Bringmann, Oliver; Ecker, Wolfgang; Feldner, Ingo; Frischknecht, Adrian; Gerum, Christoph; Hämäläine...
Proceedings - 2021 International Conference on Hardware/Software
Codesign
and System Synthesis, CODE...
2021
Publicationer information ikon
Fast processor core selection for WLAN modem using mappability estimation
Referentgranskad
DOI
10.1145/774789.774803
Soininen, Juha-Pekka; Kreku, Jari; Qu, Yang; Forsell, Martti
10th International Symposium on Hardware/Software
Codesign
, CODES 2002
2002
Publicationer information ikon
CRISP: Cutting Edge Reconfigurable ICs for Stream Processing
Referentgranskad
DOI
10.1007/978-1-4614-0061-5_9
Ahonen, Tapani; ter Braak, Timon D.; Burgess, Stephen T.; Geissler, Richard; Heysters, Paul; Hurskai...
Springer
2011
Publicationer information ikon
Product families on-chip: Combining the software product family paradigm with run-time reprogrammable hardware technology
Referentgranskad
DOI
10.1109/COMPSAC.2005.124
Jaring, Michel
Proceedings - International Computer Software and Applications Conference
2005
Publicationer information ikon
Product families on-chip: Combining the software product family paradigm with run-time reprogrammable hardware technology
Referentgranskad
DOI
10.1109/COMPSAC.2005.124
Jaring, Michel
IEEE Annual International Computer Software and Applications Conference (COMPSAC)
2005
Introduction to hardware/software
codesign
Referentgranskad
DOI
10.1007/978-94-017-7267-9_41
2017
Codesign
Case Study on Transport-Triggered Architectures
Referentgranskad
DOI
10.1007/978-94-017-7358-4_39-1
2017
Software/hardware
codesign
for platform chips
1998
The DSPCAD framework formodeling and synthesis of signal processing systems
Referentgranskad
DOI
10.1007/978-94-017-7267-9_36
2017
The DSPCAD Framework for Modeling and Synthesis of Signal Processing Systems
Referentgranskad
DOI
10.1007/978-94-017-7358-4_36-1
2017
Automated HW/SW co-design for edge AI: State, challenges and steps ahead
Referentgranskad
Öppen tillgång
DOI
10.1145/3478684.3479261
2021
Fast processor core selection for WLAN modem using mappability estimation
Referentgranskad
DOI
10.1145/774789.774803
2002
CRISP: Cutting Edge Reconfigurable ICs for Stream Processing
Referentgranskad
DOI
10.1007/978-1-4614-0061-5_9
2011
Product families on-chip: Combining the software product family paradigm with run-time reprogrammable hardware technology
Referentgranskad
DOI
10.1109/COMPSAC.2005.124
2005
Product families on-chip: Combining the software product family paradigm with run-time reprogrammable hardware technology
Referentgranskad
DOI
10.1109/COMPSAC.2005.124
2005
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